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release-notes: Additional updates for the 2024-10-10 release

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Tim Gover
2024-10-15 08:45:34 +01:00
parent 3c822369be
commit f2e314d294
2 changed files with 29 additions and 13 deletions
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16
firmware-2711/release-notes.md
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@@ -2,7 +2,7 @@
## 2024-10-10: Use soft-reset to preseve SDRAM contents after ramoops (latest)
SD card high-speed/low-voltage mode can only be exited by powercycling.
* SD card high-speed/low-voltage mode can only be exited by powercycling.
Pi 4s before rev 1.4 lack the power switch required to do this, so must
resort to a global reset that turns off many things, including SDRAM.
@@ -15,8 +15,20 @@ logs.
Make the bootloader more SD_PWR_ON aware, only triggering a global reset
if one isn't found.
See: https://github.com/raspberrypi/linux/issues/5298
* Remove requirement for GPT ptable array to be at LBA-2
See: https://github.com/raspberrypi/rpi-eeprom/issues/585
* Introduce a new boot-menu feature where pressing SPACE at power on
gives the user a one-shot option to select a different boot mode.
e.g. Select USB boot if the default SD card is corrupted or unavailable.
* Display the bootloader network-install UI for longer on a cold boot to make
this feature more visible to first time users.
To revert to the previous behaviour remove NET_INSTALL_AT_POWER_ON=1
from the bootloader config.
* Default to 2GB start for PCI bus addresses on 2711 and 2712
This change also constrains the window size to 2GB, so all PCI bus address
assignments fall below 4GB, avoiding a potential bug with 32-bit BARs in
esoteric bus topologies (e.g. lots of GPUs).
## 2024-09-05: Fix self-update if EEPROM is write-protected (latest)
* arm_dt: Consult the hat_map for all HATs

4
firmware-2712/release-notes.md
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@@ -22,6 +22,10 @@
* armstubs: 2712: Rebuild with updated max-power throttle and direct stream settings
See: https://github.com/raspberrypi/arm-trusted-firmware/commit/fc45bc492dd655f9ea4893a384527341a48cf03d
* debug: Only display the program_pubkey log if configuring secure-boot
* Default to 2GB start for PCI bus addresses on 2711 and 2712
This change also constrains the window size to 2GB, so all PCI bus address
assignments fall below 4GB, avoiding a potential bug with 32-bit BARs in
esoteric bus topologies (e.g. lots of GPUs).
## 2024-09-24: Promote 2024-09-23 release (default) (automatic update)